ECEN 5593

Overview

ECEN 5593 (Fall 2019) presents the principles, characteristics, and trends of computer systems design at a level appropriate for all computer scientists and computer engineers. Computer architecture expands on the role of a traditional computer architecture course, with a focus on parallel hardware design and application software.

Intent

ECEN 5593 is intended to provide essential background for students intending to pursue research in computer architecture or related fields. The subjects covered enable students to be prepared for the industry computer architecture innovation. An important part of ECEN 5593 is reading, discussion of classic architecture, and a substantial course project.

At the end of this course, students will be able to: 

• Recognize the relationships between computer design, application domain requirements, cost/performance trade offs, and business trends in the computer industry.

• Use instrumentation tools to evaluate run time workloads on co-design hardware architectures and software environments.

• Analyze a given challenge for solution space within design requirements.

• Design and develop complete computer architecture research simulators/emulators to analyze the potential bottlenecks and opportunities in applications domains on architectures.

• Assess the performance of application implementations and optimize using the micro-architecture.

Logistics

• Meet the Professor before first lecture

  • Tentative - August 22, 2019 at 4:30 p.m. - 5:00 p.m. MST Engineering Wing Lobby

  • Please email to indicate the total participants, if no indicators are sent 24 hours before the time then the session will be canceled.

• Date Range: Aug 26, 2019 - Dec 12, 2019 

  • August 28

  • September 4, 11, 18, 25

  • October 2, 9, 16, 23, 30

  • November 6, 13, 20

  • December 4, 11

• Lecture: Wednesdays

• Time: 5:30 PM - 8:00 PM MST

• Location: ECEE 1B32 

• Office hours: by appointment

• Instructor Information:

  • Name: Joseph (Joe) Tarango 

  • Email: Joseph.Tarango@colorado.edu

Prerequisite(s)

• • Knowledge of assembly, digital logic design,  programming (C/C++),  Scripting (Python, Perl), hardware design programming (VHDL, Verilog), and computer architecture.

    • Programming language specific requirements can be learned in conjunction with the course; assuming  a strong fundamental background.

  • Students should have had at least one course in each of the above subjects.

  • Students should also have experience using an Integrated Development Environment (IDE) its associated capabilities of compilation, fault analysis, etc.

Recommended Prerequisite(s)

• ECEN/CSCI 4593 Computer Organization

• ECEN 5863 Programmable Logic Embedded System Design 

• ECEN 5813 Principles of Embedded Software

Course Expectations

• Lectures, Programming Assignments/Course Project, Readings, and Quizzes will require on average 10-14 hours per week of work

• For on campus students, class attendance is expected.

Course Description and Topics covered

Advanced Computer Architecture (ACA) covers advanced topics in computer architecture focusing on processor architectures. A range of levels are explored from technology node characteristics, micro-architecture, compiler optimization, parallel programming, run-time optimization, performance analysis, optimization tuning, fault tolerance, and power-aware computing techniques.

The objective of the course is to provide in depth coverage of current and emerging trends in computer architecture focusing on performance and the hardware/software interface. The course emphasis is on analyzing fundamental issues in architecture design and their impact on application performance. To enable a better understanding of the concepts, hands-on assignments are used to explore issues in architecture systems.

Concepts Outline

• • Computing paradigms architectures 

    • In-order, out-of-order, super scalar, very long instruction word (VLIW)

  • Micro-architectures for 

    • Reliability, dependability, and security 

    • Modeling, simulation, and emulation methodology

  • Optimizations

    • Hyper-Threading, speculation, and prediction schemes

    • Compiler techniques for instruction-level, thread-level, and memory-level parallelism

      • Instruction level parallelism (ILP)

      • Thread-level parallelism (TLP)

    • System constraint considerations for power and efficiency

    • Application specific integrated processor (ASIP)

    • Domain specific

Readings

Course materials include: textbooks, papers, lecture slides, project guides, and other online materials.

• • Required textbooks:

    • Hennessy and Patterson, Computer Architecture - A Quantitative Approach, 6th or later Edition

      • ISBN13: 978-0128119051 

      • ISBN10: 0128119055 

    • Hennessy and Patterson, Computer Organization and Design RISC-V Edition

      • ISBN13: 978-0128122754

      • ISBN10: 0128122757 

    • Patterson and Waterman, The RISC-V Reader 1st Edition

      • ISBN-13: 978-0999249116

      • ISBN-10: 0999249118

Grading

The course grade will be based on homework assignments, checkpoints, course projects, and 1 exam. The grade proportions are as follows:

• • Homework 20%

    • Analytical

    • Discussions

    • Reading Summaries

  • Quizzes 20%

    • Readings

    • Course Content

  • Course project 40%

    • Substantial research project by a group of students with the following:

      • Proposal

        • (Optional) Patent Application Mock Process

      • Git repository 

        • All members must contribute.

      • Conference-style paper (10-pages).

      • Video Presentation.

      • (Optional) Special research project focus.

        • Collaboration on research.

        • Extensions of existing projects.

  • Final Exam 20%

    • Closed book with no calculators, phones, smart watches, or computers allowed.

Collaboration Policy

• We encourage you to collaborate with other student. Each student participating in the collaboration must be clearly listed and a unique summary of session should be included for each assignment.

Regrade Policy

For errors and regrades, return the item to the within a week of the midterm being graded with a separate sheet of paper explaining the discrepancy. The staff will carefully regrade the entire item, read the reasoning provided, and then make a final decision. The entire item will be regraded, it is possible the total score could go down as a consequence of previously undiscovered mistakes being found. We therefore recommend that regrade requests only be used when the case is strong and a significant number of points are at stake.

Professionalism Policy

As a professional, it is significant to make and meet commitments. Attributes of professional behavior include: arriving on time, following directions, abiding by polices, and following through a deliverable. Acting as a professional requires treating colleagues with maturity, respect, and dignity. To maintain a level of professionalism at all times, you should strive to treat fellow colleagues, workers, etc. alike, without regard for their differences. Professionals use empathy to provide a safe environment for all to feel comfortable and confident speaking openly to one another such that all feel like they matter. When a challenges arise professionals do not place blame and help one another to the best of their abilities. Typically, these traits are considered soft skills are significant to personal and professional growth.

Late Assignment Policy

• There are no extensions with the exception of serious documented emergencies. 

• An automatic fail is given if the course is not completed.

• For complex cases, please contact the professor ahead of time.

Academic Accommodation Policy

Students with disabilities who need accommodations in order to access the course will be accommodated. Please contact DS ( https://www.colorado.edu/disabilityservices ) and apply for services. If you have emergency medical information you wish to share, or if you need special arrangements in case the building must be evacuated, please inform us as soon as possible. Please see Joe privately after class or in his office.

Honor code

A complete description of the honor code can be found here .

To summarize: "Violations of the Honor Code are acts of academic dishonesty and include but are not limited to plagiarism, cheating, fabrication, aid of academic dishonesty, lying to course instructors, lying to representatives of the Honor Code, bribery or threats pertaining to academic matters, or an attempt to do any of the aforementioned violations."

When in doubt about the honor code; please reach out to the instructor.

ISA Links

• • RISC-V (Green Card, Alternative)

  • SPARC v9

  • MIPS

  • x86

  • ARM

PLEASE NOTE: All content on the page subject to and probably will change to match state of the art topics.